Updates from 0.2.1 into 0.2.1-inu-1.5
This commit is contained in:
230
gc/mach_dep.c
230
gc/mach_dep.c
@@ -12,7 +12,7 @@
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* modified is included with the above copyright notice.
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*/
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/* Boehm, November 17, 1995 12:13 pm PST */
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# include "gc_priv.h"
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# include "private/gc_priv.h"
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# include <stdio.h>
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# include <setjmp.h>
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# if defined(OS2) || defined(CX_UX)
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@@ -21,7 +21,7 @@
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# endif
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# ifdef AMIGA
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# ifndef __GNUC__
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# include <dos/dos.h>
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# include <dos.h>
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# else
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# include <machine/reg.h>
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# endif
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@@ -62,6 +62,12 @@ asm static void PushMacRegisters()
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#endif /* __MWERKS__ */
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# if defined(SPARC) || defined(IA64)
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/* Value returned from register flushing routine; either sp (SPARC) */
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/* or ar.bsp (IA64) */
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word GC_save_regs_ret_val;
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# endif
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/* Routine to mark from registers that are preserved by the C compiler. */
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/* This must be ported to every new architecture. There is a generic */
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/* version at the end, that is likely, but not guaranteed to work */
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@@ -74,21 +80,24 @@ void GC_push_regs()
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# ifdef RT
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register long TMP_SP; /* must be bound to r11 */
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# endif
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# if defined(MIPS) && defined(LINUX)
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/* I'm not sure whether this has actually been tested. */
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# define call_push(x) asm("move $4," x ";"); asm("jal GC_push_one")
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call_push("$2");
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call_push("$3");
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call_push("$16");
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call_push("$17");
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call_push("$18");
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call_push("$19");
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call_push("$20");
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call_push("$21");
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call_push("$22");
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call_push("$23");
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call_push("$30");
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call_push("$2");
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call_push("$3");
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call_push("$16");
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call_push("$17");
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call_push("$18");
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call_push("$19");
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call_push("$20");
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call_push("$21");
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call_push("$22");
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call_push("$23");
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call_push("$30");
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# undef call_push
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# endif // MIPS && LINUX
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# endif /* MIPS && LINUX */
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# ifdef VAX
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/* VAX - generic code below does not work under 4.2 */
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/* r1 through r5 are caller save, and therefore */
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@@ -169,7 +178,10 @@ void GC_push_regs()
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# else /* !__GNUC__ */
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GC_push_one(getreg(REG_A2));
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GC_push_one(getreg(REG_A3));
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GC_push_one(getreg(REG_A4));
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# ifndef __SASC
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/* Can probably be changed to #if 0 -Kjetil M. (a4=globals)*/
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GC_push_one(getreg(REG_A4));
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# endif
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GC_push_one(getreg(REG_A5));
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GC_push_one(getreg(REG_A6));
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/* Skip stack pointer */
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@@ -208,11 +220,15 @@ void GC_push_regs()
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# endif /* __MWERKS__ */
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# endif /* MACOS */
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# if defined(I386) &&!defined(OS2) &&!defined(SVR4) &&!defined(MSWIN32) \
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# if defined(I386) &&!defined(OS2) &&!defined(SVR4) \
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&& (defined(__MINGW32__) || !defined(MSWIN32)) \
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&& !defined(SCO) && !defined(SCO_ELF) \
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&& !(defined(LINUX) && defined(__ELF__)) \
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&& !(defined(__FreeBSD__) && defined(__ELF__)) \
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&& !defined(DOS4GW)
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&& !(defined(LINUX) && defined(__ELF__)) \
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&& !(defined(FREEBSD) && defined(__ELF__)) \
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&& !(defined(NETBSD) && defined(__ELF__)) \
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&& !(defined(OPENBSD) && defined(__ELF__)) \
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&& !(defined(BEOS) && defined(__ELF__)) \
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&& !defined(DOS4GW) && !defined(HURD)
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/* I386 code, generic code does not appear to work */
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/* It does appear to work under OS2, and asms dont */
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/* This is used for some 38g UNIX variants and for CYGWIN32 */
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@@ -226,20 +242,39 @@ void GC_push_regs()
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# endif
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# if ( defined(I386) && defined(LINUX) && defined(__ELF__) ) \
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|| ( defined(I386) && defined(__FreeBSD__) && defined(__ELF__) )
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|| ( defined(I386) && defined(FREEBSD) && defined(__ELF__) ) \
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|| ( defined(I386) && defined(NETBSD) && defined(__ELF__) ) \
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|| ( defined(I386) && defined(OPENBSD) && defined(__ELF__) ) \
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|| ( defined(I386) && defined(HURD) && defined(__ELF__) )
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/* This is modified for Linux with ELF (Note: _ELF_ only) */
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/* This section handles FreeBSD with ELF. */
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asm("pushl %eax"); asm("call GC_push_one"); asm("addl $4,%esp");
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asm("pushl %ecx"); asm("call GC_push_one"); asm("addl $4,%esp");
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asm("pushl %edx"); asm("call GC_push_one"); asm("addl $4,%esp");
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asm("pushl %ebp"); asm("call GC_push_one"); asm("addl $4,%esp");
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asm("pushl %esi"); asm("call GC_push_one"); asm("addl $4,%esp");
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asm("pushl %edi"); asm("call GC_push_one"); asm("addl $4,%esp");
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asm("pushl %ebx"); asm("call GC_push_one"); asm("addl $4,%esp");
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/* Eax is caller-save and dead here. Other caller-save */
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/* registers could also be skipped. We assume there are no */
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/* pointers in MMX registers, etc. */
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/* We combine instructions in a single asm to prevent gcc from */
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/* inserting code in the middle. */
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asm("pushl %ecx; call GC_push_one; addl $4,%esp");
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asm("pushl %edx; call GC_push_one; addl $4,%esp");
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asm("pushl %ebp; call GC_push_one; addl $4,%esp");
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asm("pushl %esi; call GC_push_one; addl $4,%esp");
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asm("pushl %edi; call GC_push_one; addl $4,%esp");
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asm("pushl %ebx; call GC_push_one; addl $4,%esp");
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# endif
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# if defined(I386) && defined(MSWIN32) && !defined(USE_GENERIC)
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# if ( defined(I386) && defined(BEOS) && defined(__ELF__) )
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/* As far as I can understand from */
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/* http://www.beunited.org/articles/jbq/nasm.shtml, */
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/* only ebp, esi, edi and ebx are not scratch. How MMX */
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/* etc. registers should be treated, I have no idea. */
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asm("pushl %ebp; call GC_push_one; addl $4,%esp");
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asm("pushl %esi; call GC_push_one; addl $4,%esp");
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asm("pushl %edi; call GC_push_one; addl $4,%esp");
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asm("pushl %ebx; call GC_push_one; addl $4,%esp");
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# endif
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# if defined(I386) && defined(MSWIN32) && !defined(__MINGW32__) \
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&& !defined(USE_GENERIC)
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/* I386 code, Microsoft variant */
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__asm push eax
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__asm call GC_push_one
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@@ -283,12 +318,11 @@ void GC_push_regs()
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asm ("movd r7, tos"); asm ("bsr ?_GC_push_one"); asm ("adjspb $-4");
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# endif
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# ifdef SPARC
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# if defined(SPARC)
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{
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word GC_save_regs_in_stack();
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/* generic code will not work */
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(void)GC_save_regs_in_stack();
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GC_save_regs_ret_val = GC_save_regs_in_stack();
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}
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# endif
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@@ -348,14 +382,22 @@ void GC_push_regs()
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# endif /* !__GNUC__ */
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# endif /* M68K/SYSV */
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# if defined(PJ)
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{
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register int * sp asm ("optop");
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extern int *__libc_stack_end;
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GC_push_all_stack (sp, __libc_stack_end);
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}
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# endif
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/* other machines... */
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# if !(defined M68K) && !(defined VAX) && !(defined RT)
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# if !(defined SPARC) && !(defined I386) && !(defined NS32K)
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# if !defined(POWERPC) && !defined(UTS4)
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# if (!defined(MIPS) && !defined(LINUX))
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# if !defined(M68K) && !defined(VAX) && !defined(RT)
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# if !defined(SPARC) && !defined(I386) && !defined(NS32K)
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# if !defined(POWERPC) && !defined(UTS4)
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# if !defined(PJ) && !(defined(MIPS) && defined(LINUX))
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--> bad news <--
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# endif
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# endif
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# endif
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# endif
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# endif
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@@ -366,25 +408,51 @@ void GC_push_regs()
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void GC_generic_push_regs(cold_gc_frame)
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ptr_t cold_gc_frame;
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{
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/* Generic code */
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/* The idea is due to Parag Patel at HP. */
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/* We're not sure whether he would like */
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/* to be he acknowledged for it or not. */
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{
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static jmp_buf regs;
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register word * i = (word *) regs;
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register ptr_t lim = (ptr_t)(regs) + (sizeof regs);
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# ifdef HAVE_BUILTIN_UNWIND_INIT
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/* This was suggested by Richard Henderson as the way to */
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/* force callee-save registers and register windows onto */
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/* the stack. */
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__builtin_unwind_init();
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# else /* !HAVE_BUILTIN_UNWIND_INIT */
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/* Generic code */
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/* The idea is due to Parag Patel at HP. */
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/* We're not sure whether he would like */
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/* to be he acknowledged for it or not. */
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jmp_buf regs;
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register word * i = (word *) regs;
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register ptr_t lim = (ptr_t)(regs) + (sizeof regs);
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/* Setjmp on Sun 3s doesn't clear all of the buffer. */
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/* That tends to preserve garbage. Clear it. */
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/* Setjmp doesn't always clear all of the buffer. */
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/* That tends to preserve garbage. Clear it. */
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for (; (char *)i < lim; i++) {
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*i = 0;
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}
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# if defined(POWERPC) || defined(MSWIN32) || defined(UTS4)
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(void) setjmp(regs);
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# else
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(void) _setjmp(regs);
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# endif
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# if defined(POWERPC) || defined(MSWIN32) || defined(MSWINCE) \
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|| defined(UTS4) || defined(LINUX)
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(void) setjmp(regs);
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# else
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(void) _setjmp(regs);
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# endif
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# endif /* !HAVE_BUILTIN_UNWIND_INIT */
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# if (defined(SPARC) && !defined(HAVE_BUILTIN_UNWIND_INIT)) \
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|| defined(IA64)
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/* On a register window machine, we need to save register */
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/* contents on the stack for this to work. The setjmp */
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/* is probably not needed on SPARC, since pointers are */
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/* only stored in windowed or scratch registers. It is */
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/* needed on IA64, since some non-windowed registers are */
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/* preserved. */
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{
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word GC_save_regs_in_stack();
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GC_save_regs_ret_val = GC_save_regs_in_stack();
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/* On IA64 gcc, could use __builtin_ia64_flushrs() and */
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/* __builtin_ia64_flushrs(). The latter will be done */
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/* implicitly by __builtin_unwind_init() for gcc3.0.1 */
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/* and later. */
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}
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# endif
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GC_push_current_stack(cold_gc_frame);
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}
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}
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@@ -402,10 +470,16 @@ ptr_t cold_gc_frame;
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asm(" .globl _GC_save_regs_in_stack");
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asm("_GC_save_regs_in_stack:");
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# endif
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asm(" ta 0x3 ! ST_FLUSH_WINDOWS");
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asm(" mov %sp,%o0");
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asm(" retl");
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asm(" nop");
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# if defined(__arch64__) || defined(__sparcv9)
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asm(" save %sp,-128,%sp");
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asm(" flushw");
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asm(" ret");
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asm(" restore %sp,2047+128,%o0");
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# else
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asm(" ta 0x3 ! ST_FLUSH_WINDOWS");
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asm(" retl");
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asm(" mov %sp,%o0");
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# endif
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# ifdef SVR4
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asm(" .GC_save_regs_in_stack_end:");
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asm(" .size GC_save_regs_in_stack,.GC_save_regs_in_stack_end-GC_save_regs_in_stack");
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@@ -415,12 +489,42 @@ ptr_t cold_gc_frame;
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# endif
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# endif
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/* On IA64, we also need to flush register windows. But they end */
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/* up on the other side of the stack segment. */
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/* Returns the backing store pointer for the register stack. */
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# ifdef IA64
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# ifdef __GNUC__
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asm(" .text");
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asm(" .psr abi64");
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asm(" .psr lsb");
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asm(" .lsb");
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asm("");
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asm(" .text");
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asm(" .align 16");
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asm(" .global GC_save_regs_in_stack");
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asm(" .proc GC_save_regs_in_stack");
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asm("GC_save_regs_in_stack:");
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asm(" .body");
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asm(" flushrs");
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asm(" ;;");
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asm(" mov r8=ar.bsp");
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asm(" br.ret.sptk.few rp");
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asm(" .endp GC_save_regs_in_stack");
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# else
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void GC_save_regs_in_stack() {
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asm(" flushrs");
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asm(" ;;");
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asm(" mov r8=ar.bsp");
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asm(" br.ret.sptk.few rp");
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}
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# endif
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# endif
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/* GC_clear_stack_inner(arg, limit) clears stack area up to limit and */
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/* returns arg. Stack clearing is crucial on SPARC, so we supply */
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/* an assembly version that's more careful. Assumes limit is hotter */
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/* than sp, and limit is 8 byte aligned. */
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#if defined(ASM_CLEAR_CODE) && !defined(THREADS)
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#if defined(ASM_CLEAR_CODE)
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#ifndef SPARC
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--> fix it
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#endif
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@@ -432,6 +536,21 @@ ptr_t cold_gc_frame;
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asm("GC_clear_stack_inner:");
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asm(".type GC_save_regs_in_stack,#function");
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# endif
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#if defined(__arch64__) || defined(__sparcv9)
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asm("mov %sp,%o2"); /* Save sp */
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asm("add %sp,2047-8,%o3"); /* p = sp+bias-8 */
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asm("add %o1,-2047-192,%sp"); /* Move sp out of the way, */
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/* so that traps still work. */
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/* Includes some extra words */
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/* so we can be sloppy below. */
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asm("loop:");
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asm("stx %g0,[%o3]"); /* *(long *)p = 0 */
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asm("cmp %o3,%o1");
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asm("bgu,pt %xcc, loop"); /* if (p > limit) goto loop */
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asm("add %o3,-8,%o3"); /* p -= 8 (delay slot) */
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asm("retl");
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asm("mov %o2,%sp"); /* Restore sp., delay slot */
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#else
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asm("mov %sp,%o2"); /* Save sp */
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asm("add %sp,-8,%o3"); /* p = sp-8 */
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asm("clr %g1"); /* [g0,g1] = 0 */
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@@ -446,6 +565,7 @@ ptr_t cold_gc_frame;
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asm("add %o3,-8,%o3"); /* p -= 8 (delay slot) */
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asm("retl");
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asm("mov %o2,%sp"); /* Restore sp., delay slot */
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#endif /* old SPARC */
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/* First argument = %o0 = return value */
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# ifdef SVR4
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asm(" .GC_clear_stack_inner_end:");
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